rocket-chip · GitHub Topics

chipsalliance / rocket-chip

Rocket Chip Generator

Scala rocket-chip chip-generator chisel RISC-V rtl

Scala 3.38 k

8 小时前

riscv-boom / riscv-boom

SonicBOOM: The Berkeley Out-of-Order Machine

RISC-V boom chisel rtl rocket-chip Scala

Scala 1.84 k

5 天前

ucb-bar / chipyard

An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more

翻译 - 具有按序排列的内核，按序排列的内核，加速器等的敏捷RISC-V SoC设计框架

rocket-chip chip-generator chisel RISC-V rtl soc peripherals chipyard boom Rocket

Scala 1.78 k

1 天前

firesim / firesim

FireSim: Fast and Effortless FPGA-accelerated Hardware Simulation with On-Prem and Cloud Flexibility

fpga RISC-V Simulation datacenter hardware rocket-chip boom cloud

Scala 911

1 个月前

bu-icsg / dana

Dynamically Allocated Neural Network Accelerator for the RISC-V Rocket Microprocessor in Chisel

神经网络 rocket-chip hardware RISC-V rtl chisel

Scala 210

5 年前

eliaskousk / parallella-riscv

RISC-V Rocket Core on Parallella & ZedBoard Zynq FPGA Boards

RISC-V rocket-chip zynq Linux gsoc

SystemVerilog 100

6 年前

seldridge / rocket-rocc-examples

Tests for example Rocket Custom Coprocessors

RISC-V rocket-chip

C 69

5 年前

mit-ll / CEP

The Common Evaluation Platform (CEP), based on UCB's Chipyard Framework, is an SoC design that contains only license-unencumbered, freely available components.

RISC-V Verilog fpga rocket-chip oshw soc chipyard

C 64

2 年前

li3tuo4 / rc-fpga-zcu

Port fpga-zynq (rocket-chip) to Xilinx ZYNQ Ultrascale+ board (ZCU102)

rocket-chip RISC-V

Tcl 58

2 年前

firesim / firechip

Top-Level Project for Firebox SoC, consisting of Rocket, BOOM, and peripherals (e.g. Ethernet NIC). This is the default target generator used in FireSim.

rocket-chip soc RISC-V

C 56

5 年前