Circuit IR Compilers and Tools
翻译 - 电路红外编译器和工具
Library to compile Chisel circuits using LLVM/MLIR (CIRCT)
A repository that implements Tywaves: enabling a type-based waveform debugging for Chisel and Tydi-Chisel. Mapping from Chisel level code to values dumped by simulators is now possible thanks to Tywav...
Demonstration of a project using sifive/chisel-circt
本科编译原理大作业：Verilog to Python Testbench Module：生成 FIRRTL 中间表示的 Verilog 文法子集的前端与基于 Arcilator 生成 Python 仿真模块的后端
A collection of examples showcasing PyCDE and Mini RISC-V implementation.
Deploy CIRCT generated circuits with a streaming abstraction (circt-stream) effortlessly through Coyote.
