”vitis“ 的搜索结果

Vitis Libraries

翻译 - 葡萄图书馆

Vitis In-Depth Tutorials

Vitis AI is Xilinx’s development stack for AI inference on Xilinx hardware platforms, including both edge devices and Alveo cards.

翻译 - Vitis AI是Xilinx的开发堆栈，用于在Xilinx硬件平台（包括边缘设备和Alveo卡）上进行AI推理。

Vitis_Accel_Examples

Vitis HLS Library for FINN

Vitis HLS LLVM source code and examples

翻译 - vitis hls llvm源代码和例子

VNx: Vitis Network Examples

100 Gbps TCP/IP stack for Vitis shells

Kria Vitis platforms and overlays

Vitis AI Lab: MNIST classifier

Vitis AI examples for KV260

Port of the ZCU104_dpu Vitis Platform to the ZCU106 with instructions to build Vitis DPU_TRD

Tutorial for Vitis AI using the Sign Language MNIST

Hands-on experience programming AI Engines using Vitis Unified Software Platform

A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.

This project is trying to create a base vitis platform to run with DPU

SYCL for Vitis: Experimental fusion of triSYCL with Intel SYCL oneAPI DPC++ up-streaming effort into Clang/LLVM

Vitis-AI 1.3 TensorFlow2 flow with a custom CNN model, targeted ZCU102 evaluation board.

Custom YOLOv4 for apple recognition (clean/damaged) on Alveo U280 accelerator card using Vitis AI framework.

The project is a simple example about how to use TensorFlow to train a ConNet model from labeled dataset and then use Vitis AI tools to deploy the model into Xilinx FPGA(ZCU102 board). To make it easi...