Optimised Version of GR miner for RTM
翻译 - RTM优化版GR矿工
TensorFlow binaries supporting AVX, FMA, SSE
Example code for Intel AVX / AVX2 intrinsics.
Encapsulate the frequently used AVX instructions as independent modules to reduce repeated development workload.
AVXCAssets Generator takes path for your assets images and creates appiconset and imageset for you in just one click
TensorFlow binaries supporting AVX, FMA, SSE
Test the non-AVX, AVX2 and AVX-512 speeds across various active core counts
Intel AVX-512简介
A JIT assembler for x86/x64 architectures supporting MMX, SSE (1-4), AVX (1-2, 512), FPU, APX, and AVX10.2
翻译 - 适用于x86(IA-32)/ x64(AMD64,x86-64)MMX / SSE / SSE2 / SSE3 / SSSE3 / SSE4 / FPU / AVX / AVX2 / AVX-512的JIT汇编器
An AVX Lifter for the Hex-Rays Decompiler
AVX-optimized sin(), cos(), exp() and log() functions
Fundamental C++ SIMD types for Intel CPUs (sse, avx, avx2, avx512)
Real-time Mandelbrot zoom via SSE, AVX, OpenMP, CUDA, XaoS...
C++ wrappers for SIMD intrinsics and parallelized, optimized mathematical functions (SSE, AVX, AVX512, NEON, SVE))
Test if AVX vector loads and stores are atomic
Tensorflow GNU/Linux, MacOS binaries compiled with SSE4.1, SSE4.2 and AVX
Roaring bitmaps in C (and C++), with SIMD (AVX2, AVX-512 and NEON) optimizations: used by Apache Doris, ClickHouse, and StarRocks